一种SAR ADC电容失配自测量与数字校准技术

A Capacitor Mismatch Detection and Digital Calibration Technique for SAR ADC

为了解决高分辨率逐次逼近模数转换器(SAR ADC)中,电容式数模转换器(DAC)的电容失配导致精度下降的问题,提出了一种电容失配自测量方法,以及一种可适用于各种差分电容DAC设计的低复杂度的前台数字校准方法。该方法利用自身电容阵列及比较器完成位电容失配测量,基于电容失配的转换曲线分析,对每一位输出的权重进行修正,得到实际DAC电容大小对应的正确权重,完成数字校准。数模混合电路仿真结果表明,引入电容失配的16位SAR ADC,经该方法校准后,有效位数由10.74 bit提高到15.38 bit。

In order to solve the non-linearity errors due to the parasitic capacitors and random mismatches of the capacitive DAC array in the high-resolution applications of SAR ADC,this paper proposed a low-complexity capacitor mismatch detection and calibration technique for a differential capacitive DAC in the SAR ADC.The capacitor mismatches were detected with comparator and capacitors in SAR ADC itself without extra analog circuit.The obtained mismatch values would be used to correct bit weight of the capacitors in the DAC.AMS simulation result showed that the ENOB of 16-bit SAR ADC with capacitor mismatch increased from 10.74 bit to 15.38 bit.