期刊文献+

一种高输入电压高PSRR的带隙基准电路设计 被引量:5

A Bandgap Reference Circuit with High Voltage Input and High PSRR
下载PDF
导出
摘要 在高压宽输入范围的芯片中,高压电源一般不直接作为带隙基准电路的电源。传统方案采用齐纳二极管加源随器将高压输入转换为低压电源,为带隙基准供电,然而低压电源波动过大,降低了带隙基准的PSRR。电源由反馈环路产生,可以提供高PSRR性能。文章提出了一种输入电压范围为5~65 V,通过闭环负反馈产生低压电源和1.2 V基准电压的带隙基准电路,适用于宽输入电压芯片,如Buck、电机驱动或模拟ASIC芯片。该带隙基准电路的电源是将自身产生的电流流经PMOS,由PMOS的V_(GS)确定。因此低压电源不随输入电压变化,线性调整率极低。该电路由预处理电路、启动电路和带隙基准电路组成,采用负反馈稳压设计,不使用齐纳二极管,不引入额外的掩膜层,降低了电路成本。在CSMC 0.25μm BCD工艺下,基准电压线性调整率低至0.000091%,输入电压在5~65 V范围内基准变化小于1μV,低频PSRR为-160 dB@100 Hz,温度系数为2.8×10^(-5)/℃。 In high voltage wide input range chips,the high voltage power generally is not directly used as the power supply of the bandgap reference circuit.A Zener diode and source follower are always used to generate a low-voltage power supply for the bandgap in traditional scheme.However,the low-voltage power supply is fluctuated easily,which reduces the PSRR(power supply rejection ratio)of the bandgap.When the power supply of the bandgap is generated by the feedback loop,the reference may obtain a high PSRR performance.In this paper,a bandgap circuit with a wide input range of 5~65 V was proposed for the applications of bucks,motor drivers or analog ASIC chips.The closed-loop negative feedback circuit generated a low voltage power supply and a 1.2 V reference voltage.The power of the bandgap circuit was determined by the V_(GS) of the PMOS,and the current of the PMOS was generated by the bandgap circuit.Therefore,the low voltage power supply made no reference to input voltage,which improved the PSRR of the reference voltage.The circuit was composed of a preprocessing circuit,a start-up circuit and a bandgap circuit.No additional mask layer and Zener diode were used in this design,which reduced the circuit cost.Under CSMC 0.25μm BCD process,this design achieved a bandgap reference voltage which linear adjustment rate was 0.000091%,PSRR under low frequency was-160 dB@100 Hz and the temperature coefficient was 2.8×10^(-5)/℃.The reference voltage variation was less than 1μV when input voltage varied in the range of 5~65 V.
作者 王熠炜 孙江 叶文霞 陈宁锴 雷新宇 县文琦 WANG Yiwei;SUN Jiang;YE Wenxia;CHEN Ningkai;LEI Xinyu;XIAN Wenqi(School of Information Science and Technology,Southwest Jiaotong University,Chengdu 611756,P.R.China)
出处 《微电子学》 CAS 北大核心 2022年第4期566-571,共6页 Microelectronics
基金 国家自然科学基金重点项目(61731016)。
关键词 高压输入 高PSRR 带隙基准 负反馈 模拟集成电路 high-voltage input high PSRR bandgap reference negative feedback analog IC
  • 相关文献

参考文献4

二级参考文献15

  • 1曾健平,田涛,刘利辉,晏敏.低功耗高电源抑制比CMOS带隙基准源设计[J].湖南大学学报(自然科学版),2005,32(5):37-40. 被引量:3
  • 2BROKAW P A. A simple three-terminal IC bandgap reference [J]. IEEE J Sol Sta Circ, 1974, 9(6) : 388- 393.
  • 3HOON S K, CHEN J, MALOBERTI F. An improved bandgap reference with high power supply rejection [C]//ISCAS. Arizona, USA. 2002: 833-836.
  • 4RINCON-MORA G A, ALLEN P E. A low voltage, low quiescent, low drop-out regulator [J]. IEEE J Sol Sta Circ, 1998, 33 (1): 36-43.
  • 5马钊,闵子建.高精度电压基准源的设计[J].山西师范大学学报(自然科学版),2007,21(4):56-60. 被引量:3
  • 6BROOKS T L, WESTWICK A I.. A low-power differential CMOS bandgap reference [C] // IEEE Int Sol Sta Circ Conf. San Francisco, CA, USA. 1994: 248-249.
  • 7ALLEN P E, HOI.BERG D R. CMOS analog circuit design [M]. Oxford: Oxford University Press, 2002.
  • 8SHEN H, WU X B, YAN X I.. A precise bandgap reference with high PSRR [C] // IEEE Conf Elec Dev g- Sol Sta Circ. Hongkong, China. 2005: 267-270.
  • 9LIU K, SHEN Y D, YE Y I), et al. A current reference based on handgap technology with wide input voltage range by using 0.18 p.m BCD process [C] // IEEE Int Conf Elec Dev & Sol Sta Circ. Bangkok, Thailand. 2012: 1-2.
  • 10李晓宁,刘文平.用模型参数优化法改进带隙基准的温度[J].微电子学与计算机,2008,25(4):205-208. 被引量:2

共引文献30

同被引文献33

引证文献5

二级引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部