MATLAB高层次综合工具性能探究

Performance Exploration of MATLAB High-Level Synthesis Tool

随着高层次综合工具的快速发展,越来越多的人直接使用C、C++等高级语言来进行集成电路设计以缩短开发周期。虽然大部分高层次综合设计基于Xilinx Vivado HLS工具实现,但其主要被硬件开发工程师所熟悉,而MATLAB具有运算能力强、语法简单易于学习掌握、应用范围广等优势,被众多算法工程师所接受,因此MATLAB高层次综合工具也具有非常宽广的应用前景。为了探究基于MATLAB的高层次综合工具的设计效率,本文基于MATLAB的高层次综合工具,完成了加法器、比较器、四选一数据选择器、乘法器这些基础运算模块的设计。随后,在Xilinx Vivado开发环境中,将高层次综合设计与传统寄存器传输级(RTL)设计进行了性能对比,使用MATLAB进行高层次综合设计功耗变化程度在-5%~10%区间,面积使用量约增加5%,时序改变程度则是-14%~17%。

With the rapid development of high-level synthesis(HLS)tools,more and more people directly adopt high-level languages such as C and C++to design integrated circuit to shorten development cycle.Most of HLS design is implemented with Xilinx Vivado HLS tool which is mainly manipulated by hardware engineers.With the advantages of strong computing ability,simple and easy-to-learn grammar and various applications,MATLAB is very popular among algorithm engineers.Therefore,MATLAB HLS process also has a very wide range of application prospects.In order to explore the design efficiency of HLS method based on MATLAB,four basic operation modules are designed which contain adder,comparator,four-choice data selector and multiplier.After implementing these circuits,the performance of high-level designs is compared with that of traditional register-transfer-level(RTL)designs in Xilinx Vivado environment.The results show that the power difference ratio of MATLAB high-level designs to RTL designs varies in the range of-5%~10%,and the area usage increment ratio is about 5%,and the timing difference ratio is from-14%to 17%.