相控阵雷达信号处理器的FPGA设计与实现

FPGA design and implementation of phased array radar signal processor

在基于DSPTMS320C6678结构+FPGA Kintex 7的雷达信号处理器中,文章以有源相控阵雷达为背景,通过FPGA编程实现信号处理器的相应功能。在模式线性调频脉冲(LFM)下,完成256个周期的MTD处理以及和差三通道信号的脉冲压缩。在模式高脉冲重复频率脉冲多普勒(HPRF-PD)下,FPGA完成了窄带和波束速度搜索处理,以及波束宽带信号的距离跟踪和匹配滤波相关处理。在线性调频连续波(LFMCW)模式下,上扫频周期和下扫频周期实现了信号的FFT处理,MTD处理进行了64个周期,信号处理数据通过SRIO高速接口发送给DSP。每个FPGA处理模块的功能都在信号处理器的硬件平台上进行调试和验证,并与MATLAB处理的结果进行比较。保证信号处理器整体功能的实现,FPGA相控阵雷达信号处理模块满足实时处理要求。

In the radar signal processor based on DSPTMS320C6678 structure + FPGA Kintex 7, the article takes the active phased array radar as the background, and realizes the corresponding functions of the signal processor through FPGA programming. Under the LFM, the MTD processing of 256 cycles and the pulse compression of the sumdifference three-channel signal are completed. Under the HPRF-PD mode, the FPGA completes the narrowband and beam velocity search processing, as well as the distance tracking and matched filter correlation processing of the beam wideband signal. In the LFMCW mode, the up-sweep period and the down-sweep period realize the FFT processing of the signal, the MTD processing is carried out for 64 periods, and the signal processing data is sent to the DSP through the SRIO high-speed interface. The function of each FPGA processing module is debugged and verified on the hardware platform of the signal processor, and compared with the result processed by matlab. To ensure the realization of the overall function of the signal processor, the FPGA phased array radar signal processing module meets the real-time processing requirements.