基于MPSoC的Sub-6 GHz频段SDR测试系统设计与实现

Design and Implementation of Sub-6 GHz Software-defined Radio Test System Based on MPSoC

为实现5G高带宽信号的快速测试和复杂通信算法的快速验证,提出了一种基于MPSoC的Sub-6 GHz频段软件无线电(SDR)测试实验平台。平台采用Xilinx ZYNQ UltraScale~+MPSoC和射频收发器ADRV9009搭建,两者通过JESD204B高速串行接口进行数据流传输。采用软硬件协同设计思想,具备高可重构性和移植性,其中,硬件/PL逻辑部分负责射频信号到基带信号的转换与信号处理;软件部分依托Petalinux和Libiio的加持,可对测试系统进行全局控制。此外,该系统还拥有超宽调谐范围、可配置MIMO等优势,可作为5G SDR实验平台使用。经高带宽信号收发实验验证,该测试系统满足5G Sub-6 GHz信号收发链路要求,信道可靠性较高,在5G信号测试和算法原型验证方面,具有一定的应用价值。

In order to achieve fast testing of 5 G high-bandwidth signals and fast verification of complex communication algorithms,a Sub-6 GHz software-defined radio(SDR)test experimental platform based on MPSoC is proposed.The system is built by Xilinx ZYNQ UltraScale+MPSoC and ADRV9009 transceiver,and transmits data-stream through JESD204 B high-speed serial interface.The system is designed with the idea of hardware and software co-designand has high reconfiguration and portability.Hardware/PL logic part is used for signal processing and conversion of RF signal to baseband signal.Software part is used for control of the global system based on the support of Petalinux and Libiio.The advantages of this system are ultra-wide tuning range and configurable MIMO.In addition,this system can be used as 5 G SDR experimental platform.The experimental results of wide-band signal receiving and sending show that the system reaches the requirements of 5 G sub-6 GHz signal link,and has high channel reliability.The system has certain application value in 5 G signal testing and algorithm prototype verification.