低阻带截止频率FIR滤波器的面积优化设计

Area Optimization Design of FIR Filter with Low Stop-band Cut-off Frequency

FIR滤波器常用于数字信号处理系统中,然而低通滤波器的阻带截止频率越小,则滤波器需要的阶数也就越高,从而增加了硬件资源的消耗。在研究了升采样原理的基础上,本文提出了一种基于滤波器系数插值和通带掩膜的设计方法,能够有效减少了滤波器中乘法器的使用数量,降低资源消耗。最后以Verilog描述滤波器实现结构,采用Design Compiler对滤波器的代码进行综合,仿真结果表明,在满足各项指标的情况下,该设计能够有效节约电路面积。

FIR Filters are widely used in digital signal processing systems,however,the smaller the stop-band cut-off frequency of low-pass filters,the higher the orders of the filters,thus increasing the consumption of hardware re-sources.On the basis of studying the up-sampling principle,a design method based on filter coefficient interpolation and pass-band masking is proposed,which can effectively decrease the number of multipliers and reduce resources consumption used in filter.Finally,Verilog is applied to describe the implementation structure of the filter,and De-sign Compiler is used to synthesize the code.The simulation result shows that the design can effectively save the cir-cuit areas under the condition that all indexes are met.