利用多路选择器熵源的高移植性轻量级物理不可克隆函数研究

Research on Highly Portable Lightweight Physical Unclonable Functions Using Multiplexer Entropy Sources

SR锁存器物理不可克隆函数(Physical Unclonable Function, PUF)是基于FPGA实现的最流行加密应用,在轻量级物联网设备中拥有广阔的市场。为了实现对称无偏SR锁存PUF,研究人员提出了不同的实现方法,这些方法增加了面积消耗。该文提出一种新型的基于MUX单元的延迟门来构成M_SR PUF单元,并将稳定状态下SR锁存器的输出提取作为PUF的响应。为了验证所提出的M_SR PUF,该文在Xilinx Virtex-6,Virtex-7和Kintex-7 3个系列的FPGA上进行了实现。值得一提的是,对称布局通过“硬宏”实现相对简单,保证了PUF更好的性能。实验结果表明,所提出的M_SR PUF可以在超宽范围的环境变化(温度:0°C~80°C;电压:0.8~1.2 V)下稳定工作,平均唯一性为50.125%。此外,所提出的M_SR PUF单元具有低开销的特点,仅消耗4个MUX和2个DFF,并产生适合硬件安全应用的高熵响应。

SR Latches Physical Unclonable Functions(PUFs) are the most popular FPGA-based cryptographic applications and have a broad market in lightweight IoT devices. To realize a symmetric unbiased SR latch PUF, different implementation methods that increase area consumption have been proposed. In this paper, a novel MUX-unit-based delay gate is proposed to form the M_SR PUF unit, and the output of the SR latch in the steady state is extracted as the response of the PUF. To verify the proposed M_SR PUF, it is implemented on three series of FPGAs from Xilinx Virtex-6, Virtex-7 and Kintex-7. It is worth mentioning that the symmetrical layout is relatively simple to implement through “hard macros”, which ensures better performance of PUF. The experimental results show that the proposed M_SR PUF can work stably under an ultra-wide range of environmental changes(temperature: 0°C ~80 °C;voltage: 0.8~1.2 V) with an average uniqueness of 50.125%. Furthermore, the proposed M_SR PUF unit is characterized by low overhead,consuming only 4 MUXs and 2 DFFs, and produces a high-entropy response suitable for hardware security applications.