一种基于三维集成电路的多位碳纳米管硅通孔

A multi-bit CNT TSV based on 3D integrated circuit

针对三维集成电路中各层之间的I/O限制问题,提出了一种新型的三位碳纳米管TSV。首先利用HFSS软件对三位CNT TSV各寄生参数进行了数值计算,与基于理论的数值计算相比,具有较高的精度,各寄生参数的误差大小在3%以内。在ADS中搭建了该结构的等效电路模型,并仿真得出了它的S参数,与HFSS的S参数仿真结果相比误差在1.2%以内。然后基于三位CNT TSV的概念,提出了新的差分型多位CNT TSV。与传统GSSG型TSV以及两种新型双位TSV(G-SS-G型和GS-SG型)相比,所提出的差分型多位CNT TSV节省了芯片面积,提高了集成密度,且具有优越的抗干扰能力和更好的时延性能。最后,对所提出TSV结构进行时域眼图仿真,表明新结构具有良好的信号完整性。

Aiming at the problem of I/O limitation between layers in three-dimensional integrated circuits,a novel type of three-bit carbon nanotube Through Silicon Via(TSV)was proposed.The parasitic parameters of three-bit CNT TSV were calculated by HFSS software.Compared with the numerical calculation based on theory,it has higher accuracy,and the error of each parasitic parameter is less than 3%.The equivalent circuit model of this structure was established in ADS,and its S parameters were obtained by the simulation.Compared with the simulation results of HFSS,the error is less than 1.2%.A novel differential multi-bit CNT TSV was proposed based on the concept of three-bit CNT TSV.Compared with the traditional GSSG TSV and two kinds of novel two-bit TSVs(G-SS-G and GS-SG),the proposed differential multi-bit CNT TSV results in less chip area,improvement of the integration density,superior anti-interference ability and better delay performance.The time-domain eye diagram simulation of the proposed TSV structure shows that the novel structure has good signal integrity.