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基于国产软硬件系统的实验教学FPGA仿真工具设计 被引量:3

Design of FPGA Simulation Tool for Experimental Teaching Based on Domestic Software and Hardware System
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摘要 在当前复杂国际环境和我国高科技发展受打压背景下,提高数字系统设计仿真工具的自主化显得尤为重要。针对操作系统和CPU国产化替代趋势下实验教学缺少相关FPGA仿真工具的问题,提出基于国产操作系统和国产CPU的Verilog集成开发工具设计方案,采用Gambas实现系统整体框架,利用Plugin插件技术实现对Icarus Verilog、GTKWave、yosys的集成,能在FPGA数字逻辑设计层面实现Verilog代码的编写、错误检查、编译、仿真、综合等功能。实验结果表明,该仿真工具能够在FT2000+银河麒麟、龙芯3A4000+UOS、国产X86平台+各类国产操作系统上流畅运行;以一个4 bit计数器为例进行实验测试,其仿真输出结果正确,执行效率高,适合于轻量级科研仿真以及实验教学场景,实现了在FPGA仿真实验教学过程中对ModelSim功能的部分替代。 In the current complex international environment and the suppression of China’s high-tech background,it is particularly important to improve the degree of independence of digital system design simulation tools.Aiming at the lack of relevant FPGA simulation tools in experimental teaching under the trend of replacing operating system and CPU with domestic substitution,this paper proposes a design scheme of Verilog integrated development tool based on domestic operating system and CPU,and adopts Gambas to realize the overall framework of the system,and uses Plugin technology to realize the integration of Icarus Verilog,GTKwave and yosys,which can provide Verilog code edit,error checking,compilation,simulation,synthesis functions in FPGA digital logic design.Experimental results show that the simulation tool can run smoothly on FT2000+Galaxy Kirin,Loongson 3A4000+UOS,domestic X86 platform+various domestic operating systems;taking a four-digit counter as an example,the experimental results show that the simulation output is correct,and the execution efficiency is high,which is suitable for lightweight scientific research simulation and experimental teaching scenarios,and partially replaces the Function of ModelSim in the process of FPGA simulation experiment teaching.
作者 王建新 肖超恩 张磊 孙猛 韩英 许弘可 WANG Jianxin;XIAO Chaoen;ZHANG Lei;SUN Meng;HAN Ying;XU Hongke(Department of Electronic and Communication Engineering,Beijing Electronic Science and Technology Institute,Beijing 100070,China)
出处 《实验室研究与探索》 CAS 北大核心 2022年第11期124-128,180,共6页 Research and Exploration In Laboratory
基金 教育部新工科研究与实践项目(E-AQGABQ20202704) 北京高等教育“本科教学改革创新项目”(202110018002) 北京电子科技学院一流学科建设项目(20210064Z0401、20210056Z0402) 2021年度教育部产学合作协同育人项目(202102505001)。
关键词 国产化替代 FPGA仿真工具 Verilog代码 编译 仿真 domestic substitution FPGA simulation tool Verilog code compilation simulation
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