摘要
Two-dimensional material-based transistors are being extensively investigated for CMOS(complementary metal oxide semiconductor)technology extension;nevertheless,downscaling appears to be challenging owing to high metal-semiconductor contact resistance.Here,we propose a functional group-engineered monolayer transistor architecture that takes advantage of MXenes’natural material chemistry to offer low-resistive contacts.We design an automated,high-throughput computational pipeline that first performs hybrid density functional theory-based calculations to find 16 sets of complementary transistor configurations by screening more than 23,000 materials from an MXene database and then conducts self-consistent quantum transport calculations to simulate their current-voltage characteristics for channel lengths ranging from 10 nm to 3 nm.Performance of these devices has been found to meet the requirements of the international roadmap for devices and systems(IRDS)for several benchmark metrics(on current,power dissipation,delay,and subthreshold swing).The proposed balanced-mode,functional-engineered MXene transistors may lead to a realistic solution for the sub-decananometer technology scaling by enabling doping-free intrinsically low contact resistance.
基金
The research was funded by the Mathematical Research Impact Centric Support(MATRICS)scheme of the Science and Engineering Research Board(SERB),Government of India,under the grant number MTR/2019/000047。