基于FPGA的SRIO多通道控制系统设计与实现

Design and implementation of SRIO multiple channel control system based on FPGA

在板间互联及芯片互联方式上,SRIO具有更高的带宽及实时性。使用MSG(消息)接口的HELLO格式,发送端采用多接口设计方法,内部采用Round-Robin处理机制,实现了多通道接口在同时发送数据时共用一个SRIO接口的竞争处理;同时封装为多通道的输入输出的方式,支持接口数量、时钟域的任意扩展。经过测试验证,该系统最大可实现64个不同时钟下通道的数据收发,单通道下包和包之间延时最低可到4μs,在SRIO传输应用方向上,具有较好的应用价值。

In board and chip interconnection,SRIO(Serail RapidIO) has higher bandwidth and reliability than other protocol.In this paper,the HELLO format of the MSG(message) interface is used to multi-interface design method at the sending end,and the Round-Robin processing mechanism is used internally to realize the competition processing of the multi-channel interface sharing one SRIO interface when sending data at the same time.It supports the arbitrary expansion of the number of interfaces and the clock domain.After testing and verification,the system can realize the data sending and receiving of 64 channels under different clocks at most,and the delay between the single channel and the packet can be as low as 4μs.It has good application value in the direction of SRIO transmission application.