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一种新型的高速驱动电路

A Novel High Speed Driver Circuit
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摘要 采用0.13μm SiGe BiCMOS工艺,设计了一种分段式马赫-曾德尔调制器(MZM)高速驱动电路。驱动电路输入级中,采用容性负反馈来提高带宽,采用共模反馈来稳定共模输出电平,并通过共模反馈实现了可变增益。输出级中,采用负密勒电容、T-coil和电感峰化技术来提高带宽。输出级之间的延迟时间由微带线产生,提出了一种微带线的设计方法。仿真结果表明,驱动电路的最高工作速率可达50 Gbit/s,输出VPP可达3 V,相邻输出级之间的延迟时间为4.9 ps。该驱动电路能较好地适用于分段式MZM。 A high speed segmented Mach-Zehnder modulators(MZM) driver circuit was designed in a 0.13 μm SiGe BiCMOS process. The bandwidth of the driver input stage was expanded by the capacitive negative feedback, and the common-mode output voltage was stabilized by the common-mode feedback, contributing to a variable gain function. The bandwidth of the output stage was extended by the negative Miller capacitance, T-coil and inductive peaking technology. The propagation delay between close output stages was produced by microstrip transmission lines, so a design method of the microstrip transmission lines was presented. The simulation results show that, the maximum operating rate of the proposed driver circuit is 50 Gbit/s, the voltage output swing is 3 V and the propagation delay between close output stages is 4.9 ps. The driver circuit is well suited for segmented MZM.
作者 刘勇 李林 崔伟 孙士 LIU Yong;LI Lin;CUI Wei;SUN Shi(Chongqing Electronic Engineering Vocational College,Chongqing401331,P.R.China;The 24th Research Institute of China Electronics Technology Group Corporation,Chongqing400060,P.R.China;National Laboratory of Science and Technology on Analog Integrated Circuit,Chongqing400060,P.R.China;Chongqing Southwest IC Design Co.,Ltd,Chongqing401332,P.R.China)
出处 《微电子学》 CAS 北大核心 2022年第5期873-878,共6页 Microelectronics
基金 重庆市自然科学基金资助项目(cstc2020jcyj-msxmX0034)。
关键词 分段式MZM 驱动电路 微带线 延迟时间 模拟集成电路 segmented MZM driver microstrip transmission line propagation delay analog IC
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