数十兆赫兹级DC-DC变换器关键技术研究进展

Research Progress in Key Technologies for Multi-tens MHz DC-DC Converter

随着变换器工作频率从以往的数十千赫兹级跃至数十兆赫兹级,在显著减小系统无源元件体积、降低整体重量及成本、提高系统瞬态响应速度的同时也面临许多新的挑战。首先简要阐述数十兆赫兹级DC-DC变换器典型拓扑、驱动和控制方式,随后针对寄生电感抑制、提升宽输入宽输出能力及功率密度等关键技术展开介绍,希望能为后续相关研究提供参考。

As the working frequency of a converter jumps from tens of kHz to tens of MHz,it also faces many new challenges while significantly reducing the volume of passive components,reducing the overall weight and cost and improving the system’s transient response speed.First,the typical topologies,driver and control modes of multi-tens MHz DC-DC converters are described briefly in this paper.Then,the key technologies such as parasitic inductance suppression,improvement in wide input and wide output capability and power density are introduced,which aims to provide reference for subsequent related research.