OpenEmulator:一种面向TSN芯片验证的联合仿真平台

OpenEmulator:A co-emulation platform based on TSN chip verification

硬件仿真器是加快时间敏感网络TSN芯片验证的重要手段。由于TSN芯片复杂性远低于SoC芯片,基于CPU的硬件仿真器可满足TSN芯片验证的需求。为满足TSN芯片设计需求,设计实现了一个面向TSN芯片验证的硬件仿真器OpenEmulator。针对TSN系统仿真的特点,提出了一种应用于OpenEmulator的时间同步互锁机制,实现了运行芯片HDL设计代码的硬件仿真域与运行真实TSN软件的物理域之间的精确时间同步。OpenEmulator已经在OpenTSN芯片设计中得到应用,基于普通PC机,可在20 min内仿真包含6个节点的TSN网络初始化和首次时间同步功能,大大提升了TSN芯片仿真验证的效率。目前OpenEmulator已经开源并集成到最新发布的OpenTSN开源项目3.4版本中。

Hardware emulator is an important means to speed up the verification of Time-Sensitive Networking(TSN)chips.Since TSN chips are far less complex than SoCs(System on Chips),CPU-based hardware emulators can already meet the performance requirements of TSN chip verification.To meet the needs of the TSN chip design,a hardware emulator called OpenEmulator(abbreviated as OE)for the verification of TSN chips is designed and implemented.According to the characteristics of TSN system emulation,a time synchronization mechanism applied to OpenEmulator,called time interlock,is proposed,which realizes precise time synchronization between the physical domain running the real TSN application and the emulation domain running the hardware logic programed by the hardware description language(HDL).At present,OpenEmulator has been applied in the design process of OpenTSN chips.Based on a common PC,OpenEmulator can emulate the initialization of a 6-node TSN network and the subsequent first clock synchronization process in 20 minutes,greatly improving the efficiency of TSN chip emulation verification.Now,OpenEmulator has been open-sourced and integrated into the newly released version of the OpenTSN open source project(version 3.4).