摘要
With the surging demands for extremely high current at sub-1 V supply voltage level in high performance computing and autonomous driving,high density power delivery becomes one of the critical limiting factors for system integration.48 V power bus system is emerging for these high current applications to reduce the IR losses on the power delivery networks.Thus,there is a wide voltage gap between the power bus and the digital supply rails at the point-of-load(PoL),calling for novel power conversion topologies and system architectures.Although the performances of the integrated power circuits heavily depend on both the quality factor of passive components and the figure-of-merit(FoM)of active devices,a smart circuit designer should also find an optimum way to guide the currents and to deliver the power.
基金
supported by the National Natural Science Foundation of China under Grant 62122001
the Macao Science and Technology Development Fund (FDCT) under Grant 0023/2022/A1