基于FCM的芯粒测试电路设计与实现

Design and Implementation of Chiplet Testing Circuit Based on FCM

设计了一种改进的2.5D芯粒可测性电路,电路的核心是位于中介层的灵活可配置模块(Flexible configu?rable modules,FCM),该模块基于IEEE 1838标准提出的灵活并行端口设计,采用双路斜对称设计结构,水平方向的两条线路可同时向左和向右传输控制信号以及测试数据,彼此独立互不干扰。与IEEE 1838灵活并行端口相比,FCM可以简化扫描测试配置步骤,满足水平双线路传输场景需求。仿真结果表明,基于FCM设计的2.5D芯粒测试电路可以实现对原有可测性设计(Design for test,DFT)测试逻辑的复用,满足芯粒即插即用的策略,提升测试的灵活性和可控性。

An improved 2.5D Chiplet testability circuit was designed.The core of the circuit is the flexible and configurable modules(FCM)located in the interposer,which is designed based on the flexible parallel port design proposed by IEEE 1838 standard.FCM adopts dual-channel oblique symmetry design structure.The two lines in the horizontal direction of FCM can transmit control signals and test data to the left and right independently at the same time.Compared with the IEEE 1838 flexible parallel port,FCM can simplify the scan test configuration steps and meet the requirements of horizontal dual-line transmission scenarios.The simulation results show that the 2.5D chiplet test circuit designed based on FCM can realize the reuse of the original DFT(design for test)test logic,meet the strategy of chip plug and play,and improve the flexibility and controllability of testing.