基于ST的EMD算法在FPGA上的设计与实现

Design and Implementation of ST-based EMD Algorithm on FPGA

经验模态分解算法(EMD)作为希尔伯特-黄变换的重要组成部分,其在大部分工程领域都起着重要的作用,但算法本身所需的大量的计算量使得其在软件上实现高速计算是比较困难的,并且传统的EMD算法中的三次样条插值(CSI)对硬件环境的实现并不友好。为此,提出用锯齿变换(ST)代替CSI在基于Artix-7 FPGA上进行设计与实现,并在仿真平台上进行测试。最后的结果表明,提出的设计可以有效地处理高频信号,并相对于传统的EMD算法,实现采样率从161 kHz提升到了25 MHz,计算1 000个样本的速度从0.001 5 s提升到了0.000 9 s。

As an important part of the Hilbert-Huang transform,the empirical mode decomposition algorithm(EMD)plays an important role in most engineering fields,but the large amount of computation required by the algorithm itself leads to It is difficult to realize high-speed calculation in software,and the cubic spline interpolation(CSI)in the traditional EMD algorithm is not friendly to the realization of the hardware environment.To this end,this paper proposes to use the sawtooth transform(ST)instead of CSI to design and implement on Artix-7 FPGA,and test it on the simulation platform.The final results show that the design proposed in this paper can effectively process high-frequency signals.Compared with the traditional EMD algorithm,the sampling rate is increased from 160 kHz to 25 MHz,and the calculation speed of 1000 samples is increased from 0.0015 s to 0.0009 s.