基于UVM的电子标签验证平台的设计与实现

Design and implementation of RFID verification platform based on UVM

射频识别电子标签(RFID)芯片具有命令多、状态多、Memory容量大、分区多等特点,这些特点增加了芯片仿真验证的工作量和难度。为了解决Verilog语言搭建的传统电子标签验证平台测试例数量众多和验证场景不全面的问题,基于通用验证方法学(UVM)搭建了一套随机化可重用的电子标签验证平台。相比于传统验证平台,新的验证平台采用事务级建模和分层的激励产生机制,结构清晰,验证用例简洁,运行效率较高,并且功能覆盖率可以达到100%,代码覆盖率也有所提升。

The Radio Frequency Identification(RFID)chip has many features such as multiple commands,multiple states,large memory capacity,and multiple partitions.These features increase the workload and difficulty of chip simulation verification.In order to solve the problem of the traditional simulation verification platform built by Verilog language,which has problems such as numerous test cases and incomplete verification scenarios,an implementation method of a randomized and reusable electronic tag verification platform based on Universal Verification Methodology(UVM)is described.Compared with the traditional verification platform,the new platform adopts transaction-level modeling and hierarchical incentive mechanism,which has clear structure,concise cases,higher operational efficiency,and the functional coverage can reach 100%,and the code coverage rate can be raised as well.