数字芯片形式验证的研究与应用

Research and Application of the IC Formal Verification

形式验证是一种数字芯片设计的验证方法,主要思想是通过使用形式证明的方式来验证一个设计的功能是否正确。由于不需要测试者考虑如何获得测试激励,所以可以有效地提高验证效率,减少验证周期。文章研究了主流的数字芯片验证方法,分析了形式验证的基本流程,搭建了一个典型的形式验证平台,并使用VC_Formal工具进行仿真调试。

Formal verification is a verification method of IC design.The main idea is to verify the function of a design is correct by of formal proof.Since the tester does not need to consider how to obtain the test incentive,it can effectively improve the verification efficiency and reduce the verification time.This paper introduces the mainstream IC verification methods,analyzes the formal verification process,builds a typical formal verification platform and uses VC_Formal for simulation and debugging.