基于WCOJ的UPF供电状态分析器的设计与实现

Design and implementation of UPF power supply state analyzer based on WCOJ

随着集成电路工艺水平日益提高,单个芯片上可集成的功能单元数不断增加,电路的总功耗也变得越来越高,特别是超大规模集成电路设计的功耗问题已经无法回避。一套完备的基于UPF的低功耗设计流程可以解决该问题。针对UPF分析主要为数据表运算的特点,提出了一种WCOJ算法——Leapfrog,对电压域中的每个层次结构的供电电源状态表进行设计规则检查与合并,并设计实现了一个基于WCOJ的UPF供电状态分析工具。实验结果表明,该算法在空间复杂度与时间复杂度方面均有改进,且可移植性强,具有重要的理论与实践意义。

With the improvement of IC technology level,the number of functional units that can be integrated on a single chip is increasing,and the total power consumption of the circuit is becoming higher and higher,especially the power consumption problem of VLSI design has become unavoidable.To solve this problem,a low-power design process based on Unified Power Format(UPF)is proposed.In view of the feature that UPF analysis mainly consists of data table operations,an algorithm based on WCOJ(Worst-Case Optimal Join)is proposed to check and merge the design rules of the power supply state table of each hierarchy in the voltage domain,and a power supply state analysis tool in low power design analyzer is designed and implemented.The experimental results show that the proposed algorithm has lower spatial complexity and time complexity than the binary merge algorithm,and has strong portability,which has important theoretical and practical significance.