摘要
针对多队列数据流发送控制实现时占用逻辑资源多和流量控制的粒度大、误差大等问题,利用现场可编程门阵列(FPGA)和Verilog HDL设计了一种基于“调度+反馈”的多队列数据流发送控制系统。将寄存器与存储器模块作为指令控制模块以满足多样化需求;使用状态机控制系统工作流程以保障各模块间的协同工作;利用调度控制缓冲区数据的发送状态,以完成多队列数据的控制与隔离;在流量计算与控制的过程中利用误差采集反馈来减少误差并降低控制粒度,并在FPGA设计上利用分时复用来节省逻辑资源。对所设计的Verilog HDL程序进行EDA仿真和基于自主搭建平台的FPGA系统试验,结果证实了多队列数据流发送控制系统的有效性和先进性。
A multi-queue data flow transmission control system based on“scheduling+feedback”was designed using FPGA field programmable gate array(FPGA)and Verilog HDL to address the problems of large logic resources and large granularity and error of flow control.The register and memory modules were used as instruction control modules to meet the diverse needs of users.The system used a state machine to control the workflow to ensure the cooperative work among various modules.The scheduling module controlled the transmission status of buffer data to complete the control and isolation of multi-queue data.The method of error collection and feedback was used to reduce errors and control granularity in the process of flow calculation and control.The time-division multiplexing was used to save the logic resources of FPGA.The designed Verilog HDL program was simulated by EDA,and the FPGA system test was carried out on the self-built platform.The results confirm the validity and advancement of the multi-queue data flow transmission control system.
作者
刘政文
赵曙光
刘彷平
LIU Zhengwen;ZHAO Shuguang;LIU Pangping(College of Information Science and Technology,Donghua University,Shanghai 201620,China;Shanghai Longyao Network Technology Company Limited,Shanghai 201601,China)
出处
《东华大学学报(自然科学版)》
CAS
北大核心
2023年第3期130-135,共6页
Journal of Donghua University(Natural Science)
基金
国家自然科学基金面上项目(52173219)。
关键词
多队列数据流
发送控制
调度
反馈
FPGA
细粒度
multi-queue data flow
transmission control system
scheduling
feedback
FPGA
fine-grained