阵列信号射频数字化接收机的设计与实现

Design and Implementation of RF Digital Receiver for Array Signal

针对大阵列电子系统的小体积、低重量和可扩充要求,设计了一种S波段射频数字化接收机。提出了阵列信号射频数字化接收机的系统架构和指标设计方法,给出了一种针对多通道接收机的确定性时延设计方法,解决了射频数字化接收机中的大系统同步难题。给出了一种适用于阵列信号射频数字化接收机的FPGA处理架构,采用模块化设计方法,且软件功能可重构。测试结果表明,该射频数字化接收机的技术指标和同步功能满足系统使用需求,且已成功应用于某测控系统中。

A RF digital receiver of S band is designed to meet the requirements of small volume,low weight and expandability of large array electronic system.A system architecture and indicator design method for array signal RF digital receivers are proposed,and a deterministic delay design method for multi-channel receivers is proposed to solve the problem of large-scale system synchronization in RF digital receivers.A FPGA processing architecture suitable for array signal RF digital receivers is proposed,which adopts a modular design method and has reconfigurable software functions.The test results indicate that the technical specifications and synchronization function of the RF digital receiver meet the system usage requirements,and have been successfully applied in a measurement and control system.