期刊文献+

基于FPGA的电力电子系统电磁暂态实时仿真通用解算器 被引量:1

An FPGA-Based General Solver for Electromagnetic Transient Real-Time Simulation of Power Electronic Systems
下载PDF
导出
摘要 电力电子系统较高的开关频率给传统以CPU为计算核心的电磁暂态(EMT)实时仿真带来了挑战。为了实现小步长实时仿真,该文提出并实现一款基于FPGA的EMT实时仿真解算器。该解算器的通用化框架分为离线和在线两部分,离线程序能够自动获取仿真模型的参数并生成计算数据,在线程序能够自动配置计算资源与控制逻辑。为了提高仿真速度,还提出一种低延迟的单周期浮点累加方法,用于构建解算器的基本计算单元。基于Xilinx Virtex7 xc7vx485t型FPGA芯片的评估与分析结果表明:相比某商业FPGA实时仿真解算器,该文解算器的仿真速度提高了一倍,仿真规模增加了29.69%~79.17%。最后,还通过两种电力电子变换器的实时仿真测试,验证了它的实际性能。所提解算器能够达到400 MHz的运行速度、100 ns级的仿真步长并保持较高的仿真精度,具有通用性强、自动化程度高、配置灵活等特点。 As the frequency of power electronic switches increases,the traditional electromagnetic transient(EMT)real-time simulation based on CPUs fails to describe the high-frequency characteristics of switches accurately.It has become a trend to take FPGAs as the hardware platforms for real-time simulation.However,the following challenges exist:(1)the high programming threshold and long development cycle make it difficult to conduct a real-time simulation based on FPGAs;(2)it is hard to ensure the real-time performance of simulation while completing high complexity and large-scale iterative calculation.Therefore,this paper proposes a real-time EMT simulation universal solver for power electronic systems based on FPGAs.Firstly,a method that the node equation is reorganized into the form of a state space equation is proposed,and only the state quantity and measurement quantity in the simulation model are considered.As a result,the calculation quantity is reduced,and the calculation parallelism is increased.Secondly,the general framework of the FPGA real-time simulation solver is designed.The solver regards the fixed admittance matrix nodal method(FAMNM)as the switch modeling and circuit analysis method,and takes the multiply accumulator(MAC)for the basic computing unit.Its framework includes two parts,namely offline preprocessing and online calculation.The offline program of the solver can automatically obtain the parameters of the simulation models and generate the calculation data.A new organization method of FPGA ROM initialization data considering multiple simulation conditions is applied to improve the utilization of storage resources when generating calculation data,which splices and writes multiple data into the same initialization file.As the core of the online program,the matrix-vector multiplication(MVM)computing architecture can not only automatically configures computing resources and control logic according to parameters,but also automatically configure the reuse degree of resources by users.Finally,an implementation method of low-delay single-cycle floating-point accumulation is proposed.Rather than through a unidirectional shift,the alignment of the float-pointing accumulator is finished by a bidirectional shift,moving the shift alignment step out of the critical path of floating-point accumulation and realizing high-speed accumulation.The performance of the proposed solver is analyzed from two aspects of simulation speed and simulation scale:it can achieve a running speed of 400 MHz and a simulation step of 100 ns.Compared with the eHS solver from OPAL-RT under the same conditions,its simulation speed is doubled,and its simulation scale increases by 29.69%~79.17%.A two-level bridge converter and a three-level NPC converter are taken as test examples separately to verify the correctness and generality of the proposed solver.The real-time simulation at a high switching frequency is compared with the eHS solver based on an OP5700 simulator and the offline simulation based on Matlab.The results show that the maximum simulation errors of the proposed solver for the two examples are 3.47%and 3.08%,respectively.The following conclusions can be drawn from the theoretical analysis and simulations.The proposed general solver based on FPGAs,with high-speed MAC as the basic computing unit,can achieve a running speed of 400 MHz,a simulation step of 100ns,and maintain a high simulation accuracy.It has the characteristics of strong versatility,high automation,and flexible configuration.Under the same hardware conditions,its simulation speed,simulation scale,resource utilization,and use flexibility are all superior to the eHS solver of OPAL-RT.
作者 周斌 汪光森 李卫超 王志伟 揭贵生 Zhou Bin;Wang Guangsen;Li Weichao;Wang Zhiwei;Jie Guisheng(National Key Laboratory for Vessel Integrated Power System Technology Naval University of Engineering,Wuhan,430033 China)
出处 《电工技术学报》 EI CSCD 北大核心 2023年第14期3862-3874,共13页 Transactions of China Electrotechnical Society
基金 国防科技重点实验室资助项目(6142217200305)。
关键词 电力电子系统 FPGA 实时仿真 通用解算器 浮点数乘累加 Power electronic systems FPGA real-time simulation general solver floating-point multiply-accumulate
  • 相关文献

参考文献9

二级参考文献149

共引文献142

同被引文献12

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部