GMSK多通道接收机的非相干解调算法及FPGA实现

Non-coherent Demodulation Algorithm and FPGA Implement of GMSK Multi-channel Receiver

针对硬件资源受限的高斯最小频移键控(Gaussian Filtered Minimum Shift Keying,GMSK)信号多通道接收机,设计了一种硬件资源占用极少、译码性能良好的解调算法。对通用数字环路硬件资源进行优化,提出了一种改进算法,将环路捕获速度提升了5倍,引入一种位同步算法,该算法同步精度高、占用硬件资源少、采样率低、易于工程实现。并对2-bit差分解调算法进行改进,完成差分解调模块设计。测试结果表明,改进后的差分解调算法比改进前译码性能提升了约2 dB。该解调算法与理论值相比仅有0.6 dB的解调损耗,具有良好的解调性能,满足工程实际应用需求。

Aiming at the Gaussian Filtered Minimum Shift Keying(GMSK)signal multi-channel receiver with limited hardware resources,a demodulation algorithm with low hardware resource occupation and good decoding performance is designed.General digital loop hardware resources are optimized,and an improved algorithm is proposed,which increases the loop capture speed by 5 times and introduces a bit synchronization algorithm with high synchronization accuracy,less hardware resources,and low sampling rate.This approach facilitates engineering implementation.And a 2-bit differential demodulation algorithm is improved to complete differential demodulation module design.Test results show that the improved differential demodulation algorithm improves decoding performance by about 2 dB compared with the previous one.Compared with the theoretical value,the demodulation algorithm has only a demodulation loss of 0.6 dB,has good demodulation performance,and meets practical application requirements of engineering.