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2.5D系统封装中高速I/O链路信号/电源完整性协同仿真

Co-simulation of Signal/Power Integrity for High-speed I/O Link Based on 2.5D Package
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摘要 提出了一种2.5维(2.5D)系统封装高速输入/输出(I/O)全链路的信号/电源完整性(Signal integrity/power integrity,SI/PI)协同仿真方法。首先通过电磁全波仿真分析SiP内部“芯片I/O引脚-有源转接板-印刷电路板(即封装基板)-封装体I/O引脚”这一主要高速信号链路及相应的转接板/印刷电路板电源分配网络(Power distribution network,PDN)的结构特征和电学特性,在此基础上分别搭建对应有源转接板和印刷电路板两种组装层级的“信号链路+PDN”模型,并分别进行SI/PI协同仿真,提取出反映信号链路/PDN耦合特性的模块化集总电路模型,从而在电路仿真器中以级联模型实现快速的SI/PI协同仿真。与全链路的全波仿真结果的对比表明,模块化后的协同仿真有很好的可信度,而且仿真时间与资源开销大幅缩减,效率明显提升。同时总结了去耦电容的大小与布局密度对PDN电源完整性的影响及对信号完整性的潜在影响,提出了去耦电容布局优化的建议。 A signal/power integrity(SI/PI)co-simulation method for the full link of 2.5 dimen-sional(2.5D)system-in-package(SiP)high-speed input/output(I/O)was proposed in this paper.The method was as follows:firstly,the structural and electrical characteristics of the main and global high-speed signal link"chiplet I/O pin-active interposer-printed circuit board(i.e.packaging substrate)package I/O pin"inside a SiP and the corresponding power distribution network(PDN)of the active interposer/printed circuit board were analyzed by electromagnetic full-wave simulation.On this basis,the"signal link+PDN"models corresponding to the two assembly levels of the active interposer and the PCB(printed circuit board)were built respectively,and the SI/PI co-simulation was carried out respectively,and two modular lumped circuit models corresponding to these two levels that could reflect the coupling between the signal chain and PDN were extracted,so that the rapid SI/PI co-simulation could be realized in a circuit simulator with the two models cascaded.The comparison with the full-wave simulation results of the full link shows that the modular co-simulation has good credibility,and the simulation time and resource costs are greatly reduced,and the efficiency is significantly improved.At the same time,the influence of decap(decoupling capacitor)size and layout density on PDN power supply integrity and the potential influence on signal integrity are summarized,and suggestions for decap layout optimization are put forward.
作者 孙亮 缪旻 李涛 SUN Liang;MIAO Min;LI Tao(Key Laboratory of Information and Communication Systems,Ministry of Information Industry,Beijing Information Science and Technology University,Beijing,100101,CHN;Key Laboratory of the Ministry of Education for Optoelectronic Measurement Technology and Instrument,Beijing Information Science and Technology University,Beijing,100192,CHN;Academy of Smart IC and Network,Beijing Information Science and Technology University,Beijing,100101,CHN)
出处 《固体电子学研究与进展》 CAS 北大核心 2023年第3期234-240,共7页 Research & Progress of SSE
基金 国家自然科学基金资助项目(62074017)。
关键词 2.5D系统封装 信号完整性 电源完整性 协同仿真 电源分配网络 高速I/O链路 芯粒 2.5D system-in-package signal integrity power integrity co-simulation pow-er distribution network high-speed I/O link chiplet
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