一种宽带低功耗的VCO设计

A Wideband and Low Power VCO Design

以40 nm互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)工艺为基础,设计可变电容接入电路的方式,该电路由一组固定的可变大电容与3位开关控制的可变小电容阵列组成,能很好地抑制调谐增益的变化,并且在可变电容两端加入偏置,让其工作在容值变化较为合适的区间,使控制电压对调谐范围的利用率达到最优。测试结果表明,在电源电压为1.1 V的条件下,该压控振荡器的设计功耗为1.155 mW,版图面积仅为0.089 mm2。频率的调谐范围是4.08~5.62 GHz,中心频率在4.8 GHz时的相位噪声为-116.46 dBc/Hz@1 MHz,考虑调谐范围的性能系数(Figure of Merit,FOM)值为-200.03 dBc/Hz,具有良好的综合性能。

The chapter is based on the 40 nm Complementary Metal Oxide Semiconductor(CMOS)process to design the variable capacitor access circuit,which consists of a fixed set of variable large capacitors with a 3-position switch-controlled array of variable small capacitors,which can well suppress the variation of the tuning gain Kvco.And the bias is added at both ends of the variable capacitor,so that it works in a more appropriate range of capacitance changes,so that the control voltage to achieve optimal utilization of the tuning range.The test results show that the design power consumption is 1.155 mW and the layout area is only 0.089 mm2 at a supply voltage of 1.1 V.The frequency tuning range is from 4.08 to 5.62 GHz,and the phase noise is-116.46 dBc/Hz@1 MHz at the center frequency of 4.8 GHz,and the performance factor considering the tuning range Figure of Merit(FOM)value is-200.03 dBc/Hz,which has a good overall performance.