一种快速瞬态响应的无片外电容型LDO电路设计

A fast transient response LDO circuit design without off-chip capacitance

本文基于SMIC65 nm工艺,设计了一款快速瞬态响应的无片外电容型低压差线性稳压器(low dropout regulator,LDO).采用高增益跨导结构(OTA)的误差放大器,利用局部共模反馈结构(CFRFC),增加了放大器跨导率,提高了放大器的直流增益.同时,引入一个由电容耦合电流镜构成的瞬态检测电路,取代了传统LDO电路中的大电容,便于检测输出的跳变,增大对功率管的充放电能力,提高了环路瞬态响应速度,降低LDO环路的上/下冲电压.缓冲级采用了带电压负反馈的源级跟随器,在一定的静态功耗下,提高了动态电流,将次级点推到更高的频率,提高了电路相位裕度.仿真结果表明,输入电压为2~3 V时,该电路输出为1.2 V,最大负载电流为100 mA;当负载电流在0~100 mA时,LDO输出的最大过冲电压和欠冲电压为23 mV和27 mV,并且在低频时有较高的电源抑制比.

In this paper,a low dropout linear regulator(LDO)with fast transient response and no off-chip capacitance is designed based on SMIC 65 nm process.An error amplifier with a high gain transconductance structure(OTA)is used to increase the amplifier transconductance using a local common-mode feedback structure(CFRFC),which greatly improves the dc gain and conversion rate of the amplifier.A transient detection circuit consisting of a capacitor-coupled current mirror is introduced to improve the loop transient response speed,stabilize the loop and reduce the LDO up/down voltage.A super source follower is used in the buffer stage to increase the dynamic current at a certain static power consumption,pushing the secondary point to a higher frequency and improving the phase margin of the circuit.Simulation results show that the circuit outputs 1 V at an input voltage of 2~3 V with a maximum load current of 100 mA;the maximum overshoot and undershoot voltages of the LDO output are 23 mV and 27 mV when the load current is in the range of 0~100 mA,and it has a high supply rejection ratio at low frequencies.