一种高dV/dt噪声抑制的电平位移电路设计

Design of a Level Shifter for High dV/dt Noise Immunity

在半桥栅驱电路中,低压域PWM控制信号需要通过电平位移电路来转换成高边浮动电压域的PWM控制信号,从而打开或关断上桥臂功率管。浮动电源轨的快速浮动会带来dV/dt噪声,影响电平位移电路信号传输的可靠性。文章在电平位移电路中分别设计了防止误关断辅助电路和防止误开启辅助电路。防止误关断辅助电路在上桥臂开启状态下检测到dV/dt噪声后,能够使电平位移电路的输出保持高电平状态,防止上桥臂功率管被误关断;防止误开启辅助电路在上桥臂关断状态下检测到dV/dt噪声后,能够使电平位移电路的输出保持低电平状态,防止上桥臂功率管被误开启。基于0.18μm BCD工艺进行仿真验证,所设计的电平位移电路开通传输延时仅为1.2 ns,具备100 V/ns的dV/dt噪声抑制能力。

In the half-bridge gate driver,the low voltage domain PWM signal needs to be converted into a highside floating voltage domain PWM signal through a level shifter,thereby turning on or off the high-side power transistor.The fast floating of the floating power rail will cause dV/dt noise,which affects the reliability of the signal transmission of the level shifter.In this paper,the auxiliary circuits were designed to prevent false turn-on and turn-off respectively in the level shifter.When the upper bridge arm turned on,once detecting dV/dt noise,the auxiliary circuit for preventing false shutdown could keep the output of the level shifter in a high level state to prevent the upper bridge arm from being turned off by mistake.When the upper bridge arm turned off,once detecting dV/dt noise,the auxiliary circuit for preventing false turn-on could keep the output of the level shifter in a low level state to prevent the upper bridge arm from being turned on by mistake.Based on O.18μm BCD process simulation verification,the designed level shifter has only 1.2 ns turn-on transmission delay,and 1o0 V/ns dV/dt slewingimmunity.