期刊文献+

应用于低频无源RFID的低成本2 kbit EEPROM 被引量:1

A Low Cost 2 kbit EEPROM for Low Frequency Passive RFIDs
下载PDF
导出
摘要 基于350 nm 2-poly 3-metal EEPROM工艺,设计了一种应用于低频无源RFID的低成本2 kbit EEPROM存储器。在保证存储容量能满足大多数使用场景的情况下,通过优化Dickson电荷泵和读出电路的结构,实现电路版图面积的最小化,从而对整体电路实现低成本设计。优化后的Dickson电荷泵能实现10μs内从3.3 V到16 V的稳定升压,且功耗为334μW;读出电路基于检测NCG器件阈值电压的方式实现存储逻辑值的判别,该方法不需要能提供高精度电流的基准电路和具有高增益的灵敏放大器,有效降低了整体电路的面积。低成本2 kbit EEPROM的工作电压为3.3 V,能实现32位并行输入和1位串行输出,芯片总面积仅为0.14 mm^(2),有效降低了低频无源RFID设计复杂度和制造成本。 A low cost 2 kbit EEPROM memory was designed in a 350 nm 2-poly 3-metal EEPROM process for low frequency passive RFID applications.The design minimized the layout area by optimizing the Dickson charge pump and the readout circuit,while ensuring that the memory capacity could meet most usage scenarios.The optimized Dickson charge pump provided a stable voltage boost from 3.3 V to 16 V in 10μs with the power consumption of 334μW.The readout circuit was based on detecting the threshold voltage of the NCG device to discriminate the stored logic value,which eliminated the need for a high precision current reference circuit and a sensitive amplifier with high gain,effectively reducing the overall circuit area.The low cost 2 kbit EEPROM operated at 3.3 V and was capable of 32 bit parallel input and one-bit serial output,with a total chip area of O.14 mm^(2),effectively reducing the complexity and manufacturing cost of low frequency passive RFID designs.
作者 李海鸥 刘耀隆 朱蒙洁 余新洁 徐卫林 陈永和 翟江辉 LI Haiou;LIU Yaolong;ZHU Mengjie;YU Xinjie;XU Weilin;CHEN Yonghe;ZHAI Jianghui(Guangxi Key Lab.of Precision Naviga.Technol.and Applic.,Guilin Univ.of Elec.Technol,Guilin,Guangxi 541004,P.R.China)
出处 《微电子学》 CAS 北大核心 2023年第2期261-266,共6页 Microelectronics
基金 国家自然科学基金资助项目(61874036) 专用集成电路与系统国家重点实验室开放课题(KVH1233021) 广西创新研究团队项目(2018GXNSFGA281004) 广西精密导航技术与应用重点实验室项目(DH2020013) 广西科技重大专项(2021AA09004)。
关键词 电可擦除可编程只读存储器 Dickson电荷泵 射频识别 低成本 EEPROM Dickson charge pump RFID low cost
  • 相关文献

参考文献3

二级参考文献9

  • 1徐飞,贺祥庆,张莉.一种40 ns 16 kb EEPROM的设计与实现[J].微电子学,2005,35(2):133-137. 被引量:5
  • 2Kawahara T, Kobayashi T, Jyouno Y. Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories. IEEE J Solid-State Circuits, 1996, 31 (11): 1590.
  • 3Dickson J F. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique. IEEE J Solid-State Circuits, 1976, 11(3): 374.
  • 4Shin J, Chung I Y, Park Y J. A new charge pump without degradation in threshold voltage due to body effect. IEEE J Solid-State Circuits, 2000, 35(8): 1227.
  • 5Racape E, Daga J M. A PMOS-switch based charge pump, allowing low cost implementation on a CMOS standard process. ESSCIRC, 2005:77.
  • 6Ker M D, Chen S L, Tsa C S. Design of charge pump circuit with consideration of gate-oxide reliability in low-voltage CMOS processes. IEEE J Solid-State Circuits, 2006, 41(5): 1 100.
  • 7Ker M D, Chen S L. On-chip high-voltage charge pump circuit in standard CMOS processes with polysilicon diodes. ASSCC, 2005:157.
  • 8MENG Xiangyun,YANG Sen,CHEN Zhongjian,LU Wengao,ZHANG Yacong,HUANG Jingqing,LI Haojiong,SU Weiguo,LI Song.Low Power EEPROM Designed for Sensor Interface Circuit[J].Chinese Journal of Electronics,2012,21(4):642-644. 被引量:1
  • 9XIAO Meihua,LI Wei,ZHONG Xiaomei,YANG Ke,CHEN Jia.Formal Analysis and Improvement on Ultralightweight Mutual Authentication Protocols of RFID[J].Chinese Journal of Electronics,2019,28(5):1025-1032. 被引量:3

共引文献6

同被引文献7

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部