High threshold voltage enhancement-mode GaN p-FET with Sirich LPCVD SiN_(x) gate insulator for high hole mobility

In this work,the GaN p-MISFET with LPCVD-SiN_(x) is studied as a gate dielectric to improve device performance.By changing the Si/N stoichiometry of SiN_(x),it is found that the channel hole mobility can be effectively enhanced with Si-rich SiN_(x) gate dielectric,which leads to a respectably improved drive current of GaN p-FET.The record high channel mobility of 19.4 cm2/(V∙s)was achieved in the device featuring an Enhancement-mode channel.Benefiting from the significantly improved channel mobility,the fabricated E-mode GaN p-MISFET is capable of delivering a decent-high current of 1.6 mA/mm,while simultaneously featuring a negative threshold-voltage(VTH)of–2.3 V(defining at a stringent criteria of 10μA/mm).The device also exhibits a well pinch-off at 0 V with low leakage current of 1 nA/mm.This suggests that a decent E-mode operation of the fabricated p-FET is obtained.In addition,the VTH shows excellent stability,while the threshold-voltage hysteresisΔVTH is as small as 0.1 V for a gate voltage swing up to–10 V,which is among the best results reported in the literature.The results indicate that optimizing the Si/N stoichiometry of LPCVD-SiN_(x) is a promising approach to improve the device performance of GaN p-MISFET.