Flash型FPGA的编程及干扰抑制技术

Programming and Disturb Inhibit Technology of Flash-Based FPGA

为了降低Flash型现场可编程门阵列(FPGA)中的Flash开关单元在编程中受到编程干扰对阈值电压的影响,提高驱动能力的一致性,提出了高位宽编程技术与常用的选择管隔离技术相结合来抑制编程干扰的方法。通过高位宽编程技术降低编程过程中栅扰对同一行中Flash开关单元阈值电压的影响;通过选择管隔离技术降低编程过程中漏扰对同一列中Flash开关单元阈值电压的影响;采用NMOS晶体管作为隔离管实现自限制编程,对Flash开关单元的阈值电压进行精确控制。实验结果表明,参照系统等效门数为百万门级Flash型FPGA中的Flash开关阵列形式2 912 bit×480 WL×20 Bank,按最差条件进行479次漏扰测试,Flash开关单元受编程干扰后的阈值电压漂移约为0 V;进行时长为40μs的栅扰测试,Flash开关单元受编程干扰后阈值电压漂移约为0.02 V。

In order to reduce the influence of programming disturb on the threshold voltage of Flash switch unit in Flash-based field programmable gate array(FPGA)and improve the consistency of drive capability,a method of high bit width programming combined with the common selective transistor isolation technology was proposed to suppress programming disturb.The influence of gate disturbance on the threshold voltage of Flash switch unit in the same line was reduced by high bit width programming technology.The influence of drain disturbance on the threshold voltage of Flash switch unit in the same column was reduced by the selective transistor isolation technology.NMOS transistors were used as isolation transistors to realize self-limiting programming,which precisely controlled the threshold voltage of Flash switch unit.The experimental results show that according to 2912 bitx480 WLx20 Bank of Flash switch array in Flash-based FPGA with the equivalent number of millions of gates in the system,479 times drain disturbance tests were carried out under the worst condition,and the threshold voltage drift of Flash switch unit is about O V after programming disturb.The threshold voltage drift of Flash switch unit is about 0.02 V after gate disturbance test for 40μs.