芯片高密度互连电子电镀成形与性能调控技术研究

Review on the electrodeposition and properties of high-density chipinterconnection

信息技术的飞速发展,对芯片性能提出了越来越高的要求,芯片中晶体管和电子互连的密度也在不断增加.电子电镀是大马士革以及芯片封装电子互连的主要成形方法,互连密度的提高对于电子电镀成形工艺及性能调控方法提出了许多新的要求.本文概述了本团队近几年在芯片高密度互连的电子电镀成形方法以及性能调控方面的研究成果,主要包括3D TSV垂直互连及大马士革互连的填充及后处理工艺、高密度凸点电镀成形方法及互连界面可靠性研究、特殊结构微纳互连的制备及性能调控方法、微纳针锥结构低温固态键合方法、水相化学及电化学接枝有机绝缘膜等工作,以期对芯片电子电镀领域的研究带来启迪,推动芯片高密度互连技术的发展.

The rapid development of information technology requires better performance of chips,for which the density of transistors and interconnects on chips is massively expanding.Electroplating is the main fabrication technique for the interconnection in damascene and packaging process,and the increase of interconnection density has put forward new requirements for the electrodeposition of interconnects.In this article,we briefly introduce the recent research of our team regarding the electrodeposition and property regulation of chip interconnects,including the filling the postprocessing of 3D TSV and damascene interconnects,electrodeposition and reliability of high density micro-bumps,preparation and application of interconnects with various particular structures,application of micro/nano cone array in low-temperature bonding and chemical/electrochemical grafting of organic insulating films.Hopefully these researches may bring the enlightenment and promote the development of high-density interconnection technology of chips.