基于铜夹互连的双芯片功率器件的热力机械性能研究

Investigation of thermal-mechanical performance of dual-chip SiC power devices based on Cu clip interconnection

传统的功率半导体器件封装结构通常会采用铝(Al)线键合,这就导致了器件电路寄生电感大和可靠性问题,限制了碳化硅(SiC)功率器件的发展。有研究人员提出了一种新型的铜夹互连工艺,可实现双面散热和提高器件的功率密度,但目前的研究主要集中在其热性能和可靠性方面,缺少对结构设计的优化研究。因此,有必要对多芯片铜夹互连的结构优化设计开展进一步研究。文章针对铜夹功率器件重要的结构参数对芯片应力集中的影响进行了仿真研究。结果表明,铜夹厚度对芯片应力集中影响最大,而铜夹跨度影响最小。对比采用焊料层应力最小的结构参数建立铜夹器件模型与对应的引线模块,可发现在功率循环下,铜夹器件的铜夹和焊料层的疲劳寿命相比于引线模块提升了10倍以上,并且卸荷槽对提升铜夹器件疲劳寿命有显著影响。

Traditional packaging structures of power semiconductor device use aluminum(Al)wire for bonding.This leads to high parasitic inductance and reliability issues,limiting the development of silicon carbide(SiC)power devices.Researchers have proposed a new copper clip interconnection process that enables double-sided heat dissipation and improves the power density of the devices.How‐ever,current research mainly focuses on its thermal performance and reliability,lacking exploration of structural design optimization.Further research is necessary to optimize the structure design of multi-chip copper clip interconnections.This study investigated the influ‐ence of critical structural parameters of the copper clip power devices on chip stress concentration through simulations.The results indi‐cate that the copper clip thickness has the most significant impact on chip stress concentration,while the copper clip span has the least in‐fluence.Optimal structural parameter which was compared with the smallest solder layer stress were used to establish a copper clip de‐vice model and the corresponding wire-bonded module.The findings reveal that,under power cycling,the copper clip device shows a more than 10 times improvement in the fatigue life of both the copper clip and solder layer compared with the wire-bonded module.And the unloading groove significantly helps improve the fatigue life of copper clip devices.