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面向SoC开发的一致性时钟信息管理方案

Consistent clock information management scheme for SoC development
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摘要 受益于芯片时钟优化处理技术,时钟信息的管理也变得更为复杂。一致性时钟信息缺失可能造成芯片时钟数据的错误输入和输出,继而影响最终后端综合结果。文中提出了一个覆盖芯片开发全流程的一致性时钟信息管理方案,采用Python、Tkinter、Graphviz技术共同实现对时钟信息进行中心化管理、可视化编辑、脚本批量处理。项目投入使用后,减少了整体时钟冗余信息32.8%,节省后端维护脚本时间76.0%,降低时钟信息出错率88.3%。多个部门利用一致性时钟信息获得所需信息,跨时钟域检查和后端综合均从该方案受益。 As a result of the chip clock optimization technology,the management of clock information becomes more complex.The lack of consistent clock information may cause incorrect input and output of chip clock data,and then affect the final back-end synthesis results.A consistent clock information management solution covering the whole process of chip development is proposed.Python,Tkinter and Graphviz technologies are used to jointly realize centralized management,visual editing and batch script processing of clock information.After being applied in the project,the overall clock redundancy information is reduced by 32.8%,the back-end maintenance script time is saved by 76.0%,and the clock information error rate is reduced by 88.3%.Many departments use the consistent clock information to obtain the required information,and clock-domain crossing check and back-end synthesis benefit from the solution.
作者 刘斌 虞小鹏 谭年熊 LIU Bin;YU Xiaopeng;TAN Nianxiong(School of Micro-Nano Electronics,Zhejiang University,Hangzhou 310000,China;Xi’an RockerIC Integrated Circuit Technology Consulting Co.,Ltd.,Xi’an 710000,China)
出处 《电子设计工程》 2023年第22期61-66,共6页 Electronic Design Engineering
关键词 SOC 时钟 一致性 中心化 SoC clock consistence centralization
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