一种基于反相器能效的Delta-Sigma调制器

Design of Delta-Sigma modulator based on inverter energy efficiency

本文提出了一款基于反相器能效的Delta-Sigma调制器。该调制器使用3阶单环单比特量化拓扑结构,引入相关电平移位技术,提高了电荷转移的精度和积分器电路的直流增益,改善了传统反相器直流增益过低的局限性。本次电路设计基于SMIC 180 nm CMOS工艺,电源电压为1.2 V,过采样率OSR为128,采样频率为4 MHz。仿真结果表明,设计的Delta-Sigma调制器的SNR为97.16 dB,有效位数为15.6 bits,平均功耗为367μW,优值FoMs为173.5 dB,满足高能效调制器的标准。

This paper presents a Delta-Sigma modulator based on inverter efficiency.The modulator uses a 3-order single-loop single-bit quantization topology and Correlated Level Shifting technology to improve the accuracy of charge transfer and the DC gain of the integrator circuit,thus improving the limitation of the traditional inverter's low DC gain.The circuit design is based on the SMIC 180 nm CMOS technology.The power supply voltage is 1.2 V,the over-sampling rate OSR is 128,and the sampling frequency is 4 MHz.Simulation results show that the designed Delta-Sigma modulator has a SNR of 97.16 dB,a significant digit of 15.6 bits,an average power consumption of 367μW,and an optimal FoMs of 173.5 dB,which meet the standards of high energy efficiency modulators.