模拟集成电路的系统级建模语言和方法分析

Analysis of Language and Method for System Level Modeling of Analog Integrated Circuit

阐述可以处理复杂约束条件的模拟电路系统级建模领域专用语言和建模方法,该语言包含系统级模型建模所需的语法要素和语法规约,以及语言要素的语义同电路特征的对应关系,并给出将模拟电路元件、拓扑结构以及设计约束作为系统中的组件,以实现解耦的建模方法。实验表明,系统级建模方法为解决模拟集成电路设计中复杂约束条件解耦提供一个可行的解决思路,具有重要的研究价值。

This paper expounds a system-level modeling method for analog circuits that can handle complex constraints.This method gives a domain-specific language suitable for analog integrated circuit system-level modeling.The language contains the syntax elements and syntax protocols required for system-level modeling.This method gives the semantic correspondence between the semantics of the modeling language elements and the circuit characteristics,and gives a modeling method that treats analog circuit components,topology and design constraints as components in the system to achieve decoupling.Modeling experiments demonstrate the usability and applicability of the modeling method,which provides a feasible solution for solving the decoupling of complex constraints in analog integrated circuit design.