基于环路滤波阻抗重塑的并网锁相环改进方法

Improved Grid-connected Phase-locked Loop Method Based on Loop Filter Impedance Remodeling

锁相环(PLL)作为传统并网同步单元,在弱电网下会对并网稳定性产生不利的影响。这里搭建了并网逆变器小信号阻抗模型,分析了PLL对并网电力系统稳定性的影响机制,并给出了在常规PLL控制方法下的系统稳定性分析。在此基础上,提出了一种基于PLL改进控制和参数的设计方法,对PLL的附加阻抗进行重塑。该方法提高了系统的相位裕度,同时还满足了并网逆变器对快速性的要求。最后通过仿真和实验表明,该方法可以保证并网系统在大电网阻抗下实现高质量的并网电流输出。

The phase-locked loop(PLL),as a conventional synchronization unit of grid-connected,can adversely affect the stability of grid-connected under a weak grid.A small-signal impedance model for grid-connected inverter is built,the influence mechanism of PLL on the stability of grid-connected power systems is analyzed,and an analysis of sys-tem stability under conventional PLL control methods is given.Based on this,a PLL based improved control and pa-rameter design method is proposed to reshape the additional impedance of the PLL.The method improves the phase margin of the system and also satisfies the requirement of grid-connected inverters for fast performance.Finally,simu-lations and experiments show that the method can guarantee the grid-connected system to achieve high-quality grid-connected current output under large grid impedance.