基于FPGA的晶圆级芯片封装图像序列配准方法的设计与实现

Method of image sequence registration for wafer level chip scale packaging based on FPGA

针对未切割晶圆进行封装后的晶圆级芯片封装(WLCSP),12英寸晶圆以1μm物理分辨率进行自动光学检测(AOI)面临大幅面、高质量成像和成像速度的技术挑战。晶圆全局图像需由多幅扫描生成的局部图像序列拼接而成,为实现图像序列的高质量、高速配准,在FPGA中采用OpenCL实现相位相关法进行四邻域棋盘配准。首先在构建二维FFT和互功率谱函数内核的基础上,采用双端口缓存和行缓存的设备全局内存对计算过程的频谱数据进行复用并应用内核通道级联提高配准速度,基于最小生成树优化配准结果降低全局图像坐标计算的累积误差,并经实际扫描图像验证配准算法及加速性能。

The Wafer Level Chip Scale Packaging(WLCSP)of chips on 12-inch wafers without dicing poses significant techno-logical challenges for automatic optical inspection(AOI)in terms of high-quality imaging and imaging speed.To achieve highquality and high-speed registration of the image sequence,a local image sequence generated by multiple scans needs to be stitched together to form a global image of the wafer.To this end,a phase correlation method based on the four-neighborhood checkerboard registration is implemented using OpenCL in an FPGA to address the challenge.Initially,a two-dimensional Fast Fourier Transform(FFT)and cross-power spectrum function kernel are constructed.Then,dual-port and row-buffered device global memory are employed to reuse the computed spectral data and to apply kernel channel cascading to enhance the registra-tion speed.Finally,the registration result is optimized using a minimum spanning tree algorithm to reduce the cumulative error of global image coordinate calculation.The proposed registration algorithm and its accelerated performance are verified using actual scanned images.