摘要
为应对芯片中因工艺问题、时序偏差、电路不稳定等因素导致的flash位翻转,设计一种基于144位flash的硬件ECC。该ECC是基于144位flash设计的专用ECC,支持128位数据中1位错误检测纠正、2位错误检测和记录错误地址等功能;对2位以上错误也可做大概率检测。通过仿真实验,逐一验证功能的效果和可靠性,并通过FPGA原型验证。本设计的ECC对数据的检测纠正无需CPU处理,也无需软件处理,增强了flash和系统的可靠性,具有一定的应用价值。
A hardware ECC based on 144-bit flash is designed to deal with the flash bit flip caused by process problems,timing deviation and circuit instability.The ECC is a special ECC designed based on 144-bit flash,which supports the functions of 1-bit error checking and correction,2-bit error checking and error address recording in 128-bit data.It can also check errors with more than 2 bits with great probability.Through the simulation experiment,the effect and reliability of the function are verified one by one,and verified by the FPGA prototype.The ECC in design needs neither CPU processing nor software processing to check and correct data,which enhances the reliability of flash and the system and has certain application value.
作者
段曦冉
DUAN Xiran(The 47th Institute of China Electronics Technology Group Corporation,Shenyang 110000,China)
出处
《微处理机》
2023年第6期15-18,共4页
Microprocessors
