高精度低消耗CORDIC算法设计

Design of CORDIC Algorithm with High Accuracy and Low Consumption

针对CORDIC算法存在硬件资源消耗大、输出精度低等问题,提出一种基于区间合并迭代的改进CORDIC算法.算法在两段式CORDIC算法的基础上,采用区间合并迭代来完成第二阶段的合并迭代运算.针对合并迭代中移位运算产生的截位误差,区间合并迭代通过减少数据移位的大小和次数来减少在合并迭代过程中产生的数据误差和资源消耗.仿真结果表明,改进CORDIC算法不仅保留了两段式算法在低时延上的良好特性,在寄存器消耗上也相比基本算法减少36.8%,相比三段式和两段式算法分别减少14.8%和9.5%.当给定16 bit的输出位宽时,改进算法的平均误差相比基本算法降低37.0%,相比三段式和两段式算法分别降低19.4%和24.5%,因此更适用于高速、高精度、低消耗的现代数字通信.

Aiming at the problems of high hardware resource consumption and low output accuracy in CORDIC algorithms,this design proposes an improved Coordinate Rotation Digital Computer(CORDIC)algorithm based on interval merging iteration.Based on the two-stage CORDIC algorithm,the algorithm uses interval merging iteration to complete the merging iteration operation in the second stage.For the truncation error caused by shift operation in merge iteration,interval merge iteration reduces the data error and resource consumption generated during the merge iteration process by reducing the size and number of data shifts.The simulation results show that the improved CORDIC algorithm not only retains the good characteristics of the two-stage algorithm in low latency but also reduces register consumption by 36.8%compared with the basic algorithm,14.8%and 9.5%compared with the three-segment and two-stage algorithms,respectively.When a 16 bit output bit-width is given,the average error of the improved algorithm is reduced by 37.0%compared with the basic algorithm,19.4%and 24.5%respectively compared with the three segment and two segment algorithms.Therefore,it is more suitable for modern digital communication with high speed,high accuracy,and low consumption.