基于FPGA的面阵型CCD驱动电路设计

Design of Driving Circuit for ArrayCCD Based on FPGA

针对行间转移型面阵电耦合器件(CCD)ICX415AL,分析其驱动时序要求和工作原理,以现场可编程门阵列(FPGA)芯片EP4CE10F17C8为主控芯片,QuartusⅡ软件为开发平台,选择Verilog HDL语言设计各驱动时序信号。结合反相器和驱动芯片构建CCD外围驱动电路,利用Modelsim SE仿真软件进行联合仿真测试,得到了正确的时序波形输出,将FPGA产生的驱动时序信号接入CCD驱动电路,通过示波器观察CCD在不同条件下输出相对应的视频信号。实验结果表明,所设计的驱动电路运行稳定,满足ICX415AL各项驱动要求。

The driving timing requirements and working principle of interline transfer area array electrical coupled device(CCD)ICX415AL are analyzed.The field programmable gate array(FPGA)chip EP4CE10F17C8 is used as the main control chip and Quartus II software is used as the development platform.Verilog HDL language was used to design the drive timing signals.The CCD peripheral driver circuit is constructed by combining inverter and driver chip and the correct timing waveform output is obtained by using Modelsim SE simulation software for joint simulation test.The driver timing signal generated by FPGA is connected to the CCD driver circuit and the corresponding video signal output of CCD under different conditions is observed by oscilloscope.The experimental results show that the designed drive circuit runs stably and meets the driving require-ments of ICX415AL.