基于FPGA的LVDS+RS422远距离高速通信设计与实现

Design and implementation of LVDS+RS422 long distance high speed communication based on FPGA

针对高速信号远距离传输时存在数据可靠性下降的问题,文中设计了一种基于FPGA的软硬件结合的长线传输方案。该系统在数据传输过程中,采用NI公司的LVDS串化器芯片SN65LV1023A和SN65LV1024B作为发送与接收芯片。驱动器和均衡器的配合使用,减少了信号衰减,同时增加了电路的驱动能力和信号传输距离。在指令传输与状态反馈的电路中采用RS422通信协议,并加入保证传输可靠性的隔离芯片,极大地简化了电路。在软件方面为提高抗干扰能力,添加了8B/10B编码、指令的三判二机制和校验字,降低了误码率,提高了传输稳定性。经验证,此设计可在90 m电缆以320 Mbit/s速率零误码传输。

To solve the problem of data reliability degradation in high⁃speed signal long⁃distance transmission,this paper designs a long line transmission scheme based on FPGA combining software and hardware.In the process of data transmission,the system uses the LVDS serializer chips SN65LV1023A and SN65LV1024B of NI company as the sending and receiving chips.The combination of driver and equalizer reduces the signal attenuation,and increases the driving ability and signal transmission distance of the circuit.RS422 communication protocol is used in the circuit of instruction transmission and state feedback,and the isolation chip is added to ensure the transmission reliability,which greatly simplifies the circuit.In terms of software,in order to improve the anti⁃interference ability,the 8B/10B coding,the“three to two”mechanism of instructions and the check word are added,which reduces the bit error rate and improves the transmission stability.After verification,this design can be used for zero error code transmission at 320 Mbit/s rate on 90 m cable.