基于ATE的高速DAC射频参数SFDR测试技术优化

ATE⁃based optimization of testing technology for RF parameter SFDR of high⁃speed DAC

利用集成电路自动测试设备(ATE)测试高速DAC射频参数时,由于ATE测试板PCB走线较长、损耗较大以及机台提供的信号抖动比实装大等原因,导致ATE上高速DAC射频参数测试指标低于实装测试值。为此,文中介绍DAC电路的工作原理和测试方法;其次为解决上述问题,对测试码的生成以及PCB的布局等进行一系列改进,并将改进前后的测试值与典型值进行对比。结果表明,改进措施成效显著,大大优化了高速DAC射频参数的测试指标,使得SFDR等高频DAC动态类参数指标接近或达到实装测试值。

When using the integrated circuit automatic test equipment(ATE)to test the radio frequency(RF)parameters of high‐speed digital to analog converter(DAC),due to reasons such as long PCB wiring,high losses,and greater signal jitter provided by the machine compared to the actual installation,the testing indicators of high‐speed DAC RF parameters on ATE are lower than the actual installation test values.Therefore,the working principle and testing methods of DAC circuits are introduced.To address the above issues,a series of improvements were made to the generation of test codes and PCB layout,and the testing values before and after the improvements were compared with typical values.The results show that the improvement measures can realize significant results,greatly optimizing the testing indicators of high‐speed DAC RF parameters,and making the dynamic parameter indicators of high‐frequency DAC such as SFDR close to or reach the actual test values.