端口双向耐高压电路的ESD防护设计技术

ESD Protection Design Technology for Port Bidirectional High Voltage Resistant Circuits

随着CMOS工艺的快速发展,集成电路多电源域设计越来越普遍,电路全芯片ESD设计也越来越复杂。介绍了一款基于0.35μm CMOS工艺的32路抗辐射总线接口电路的ESD设计技术。同时,对双向耐高压输入管脚的ESD进行加固设计,提高了芯片的抗ESD能力。抗辐射32路总线接口电路通过了4.0 kV人体模型ESD测试,测试结果验证了该设计的有效性。

With the rapid development of CMOS process,integrated circuits with multiple power domain are becoming more and more common,and the circuit full-chip ESD design is becoming more and more complex.An ESD design technology for a 32-channel radiation-resistant bus interface circuit based on a 0.35μm CMOS process is presented.Meanwhile,the ESD reinforcement design of the bidirectional high voltage resistant input pins improves the ESD resistance of the chip.The radiation-resistant 32-bus interface circuit passes the 4.0 kV ESD test of human body model,and the results verify the effectiveness of the design.