特殊离子注入工艺对集成电路漏电流的影响及优化

Influence and Optimization of Special Ion Implantation Process on Integrated Circuit Leakage Current

集成电路(IC)芯片的漏电流是制约芯片功耗、性能和寿命的主要因素之一。由于芯片制造工艺的复杂性,经常出现晶圆边缘与中心区域芯片漏电流分布不均,不同晶圆之间芯片漏电流差异较大的现象。为了解决这些问题,通过对芯片漏电流与电性参数和栅极尺寸相关性的分析发现,刻蚀机台机械结构的特殊性会造成晶圆边缘与中心区域芯片栅极尺寸差异现象,导致区域漏电流差异。使用分区域离子注入法解决晶圆内区域芯片漏电流分布不均的问题,从而提高成品率;同时,通过工艺-电性联合控制法减小不同晶圆间较大的芯片漏电流差异。通过实际案例验证,采用分区域离子注入法可将成品率提升约30%;通过工艺-电性联合控制法可以将晶圆间芯片饱和电流差异缩小61%。

The leakage current of integrated circuit(IC)chips is one of the main factors restricting chip power consumption,performance and lifetime.Due to the complexity of the chip manufacturing process,the chip leakage current distribution between the edge and the central region of the wafer is often uneven,and the chip leakage currents between different wafers are quite different.In order to solve these problems,through the analysis of the correlation between chip leakage currents,electrical parameters and gate dimensions,it is found that the particularity of the mechanical structure of the etching equipment can cause the difference in chip gate dimensions between the edge and central region of wafers,resulting in the difference of regional leakage currents.The sub-regional ion implantation method was used to solve the problem of uneven chip leakage current distribution in the wafer,thereby improving the yield.At the same time,the process-electrical joint-control method was used to reduce the larger chip leakage current difference between different wafers.It is verificated through actual cases that the use of sub-regional ion implantation method can increase the yield by about 30%,and the process-electrical joint-control method can reduce the difference in chip saturation current between wafers by 61%.