摘要
为解决测试超高清视频处理主板需要更换不同规格TFT屏幕的难题,同时进一步缩短测试耗时;提出了一种FPGA器件联合DDR3 SDRAM存储芯片的尺度变换和降场频的系统结构,将不同分辨率和不同场频的视频信号归一化为高清视频信号。系统以4 K@60 Hz超高清视频作为输入信号,送到由FPGA控制的DDR3组成的视频数据读写模块中,实现数据跨时钟域传输和尺度下变换处理及视频数据的连接;连续输出尺度下变换与降场频处理后的高清视频信号。经对比实验测试,相较于多路FIFO加DDR3的存储结构,消耗的存储资源减少352 256 bit,同时转换过程耗时减少6.761μs。结果表明本系统更适用于生产线上视频处理主板的测试需求。
In order to solve the problem of replacing TFT screens of different specifications when testing UHD video processing motherboards,and further shorten the test time,a system structure is proposed that combines the scale conversion and field frequency reduction of FPGA devices with DDR3 SDRAM memory chips to normalize video signals with different resolutions and field frequencies into HD video signals.The system uses 4 K@60 Hz UHD video as the input signal and sends it to the video data reading and writing module composed of DDR3 controlled by FPGA to realize cross-domain transmission,down-scale conversion processing and data connection;continuous output the HD video signal after down-scale conversion and field frequency reduction.After comparative experiments,compared with the storage structure of multi-channel FIFO plus DDR3,the storage resources consumed are reduced by 352256 bits,and the conversion process time is reduced by 6.761μs.The results show that this system is more suitable for the testing requirements of video processing mainboards on production lines.
作者
苗其军
赵瑞康
王素珍
邹开元
Miao Qijun;Zhao Ruikang;Wang Suzhen;Zou Kaiyuan(School of Electronics&Information,Qingdao University,Qingdao 266071,China;Hisense Smart Precision Co.,LTD.,Qingdao 266520,China)
出处
《电子测量与仪器学报》
CSCD
北大核心
2023年第10期53-64,共12页
Journal of Electronic Measurement and Instrumentation
基金
山东省自然科学基金(ZR2020MF003)
山东校企联合基金(RH1900012993)项目资助。
关键词
超高清、高清视频信号
尺度下变换
场频
DDR3存储芯片
异步FIFO寄存器
FPGA器件
ultra-high-definition and high-definition video signal
down scale transformation
field frequency
DDR3 memory chip
asynchronous FIFO register
FPGA device