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基于时间控制技术的双NMOS降压直流转换器

Dual NMOS Buck DC-DC Converter Based on Time Control Technology
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摘要 为有效降低系统功耗,设计一种基于时间控制的降压直流转换器。该系统架构以时间作为处理变量,使用CMOS级类数字信号,同时不增加任何量化误差。在积分器设计中使用环形振荡器代替传统上的运算放大器,以有效降低功耗。增加延迟线,实现电压到时间的转换并求和,再利用一个简单的触发器产生PWM调制信号。本设计基于时间的控制,消除了高带宽误差放大器和模拟控制器中对脉宽调制器的需求,以及数字控制中对高分辨率ADC的需求,兼具数字和模拟控制的优点。通过测试表明,本设计整体架构仅使用7.6μA静态电流即可实现控制。 In order to effectively reduce system power consumption,a buck DC-DC converter based on time control is designed.The system architecture takes time as the processing variable and uses CMOS digital signals without increasing any quantization error.In the integrator design,a ring oscillator is used instead of the traditional operational amplifier to effectively reduce power consumption.A delay line is added to realize the conversion and summation of voltage to time,and then a simple trigger is used to generate PWM modulation signal.The design is based on time control,which eliminates the need for pulse width modulator in high-bandwidth error amplifier and analog controller,and the need for high-resolution ADC in digital control,and has the advantages of both digital and analog control.The test shows that the overall architecture of the design can be controlled only by using 7.6μA static current.
作者 梁博文 辛晓宁 任建 聂彤 LIANG Bowen;XIN Xiaoning;REN Jian;NIE Tong(School of Information Science and Engineering,Shenyang University of Technology,Shenyang 110870,China)
出处 《微处理机》 2024年第1期23-26,共4页 Microprocessors
关键词 BUCK电路 DC-DC转换器 低功耗 时间控制技术 Buck circuit DC-DC converter Low power consumption Time control technology
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