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多源冗余容错导航计算系统的设计与实现 被引量:1

Design and Implementation of Multi source Redundant Fault tolerant Navigation Computing System
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摘要 常规无人机在余度配置传感器的信号处理、余度管理、故障检测与隔离等环节占用飞控计算机过多运算资源,增加了飞控计算机的整体负荷,致使全系统可靠性降低;与此同时,传统的传感器余度配置方案和导航计算机余度设计在工程中存在方案不完备和实时性较差等局限性。鉴于此,提出一种多源冗余容错导航计算系统的解决方案,给出系统的软硬件设计方法,并基于非相似余度技术设计多源冗余传感器硬件和软件滤波算法,采用双CPU+FPGA的架构设计多源冗余容错导航计算机硬件平台以及模块化软件架构,实现了系统的软硬件的开发。经过实际测试和试验,验证了系统具有通信速率快、可靠性高和稳定性好等特点,满足了高可靠性飞控系统对新型组合惯导的需求。 The conventional UAV occupies too many computing resources of the flight control computer in the signal processing,redundancy management,fault detection and isolation of the redundancy configuration sensor,which increases the overall load of the flight control computer and reduces the reliability of the whole system.At the same time,the traditional sensor redundancy configuration scheme and navigation computer redundancy design have limitations such as incomplete scheme and poor real time performance in engineering.In view of this,this paper proposes a solution of multi source redundant fault tolerant navigation computing system,and gives the software/hardware design method of the system.Based on the non similar redundancy technology,the hardware and software filtering algorithms of multi source redundant sensors are designed.The dual CPU+FPGA architecture is used to design the hardware platform and modular software architecture of multi source redundant fault tolerant navigation computer,and the software and hardware development of the system is realized.Through the actual test and test,it is verified that the system has the characteristics of fast communication rate,high reliability and good stability,and meets the requirements of the high reliability flight control system for the new combined inertial navigation.
作者 桑可可 祖家奎 叶晓宇 刘世龙 SANG Ke-ke;ZU Jia-kui;YE Xiao-yu;LIU Shi-long(Nanjing University of Aeronautics and Astronautics,Nanjing 211000,China)
出处 《航空计算技术》 2024年第1期107-111,共5页 Aeronautical Computing Technique
基金 国家重点研发计划项目资助(2022YFC3090500)。
关键词 导航计算机 多源冗余 传感器 双CPU 容错 navigation computer multi source redundancy sensors double CPU fault tolerance
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