一种用于FPGA的低功耗系统监控电路设计

Design of a Low Power System Monitor Circuit for FPGA

为了提高FPGA工作时的可靠性和安全性,设计了一种低功耗的系统监控电路。通过对FPGA内部的工作电压、温度以及外部电压的监测,可以及时调整FPGA工作模式或者频率。在该系统监控电路中,采用自平衡的积分放大器来实现对温度感应信号的采样和放大;对电压感应信号支持单端模式和差分模式;采用1.5 bit循环ADC实现对模拟信号的量化;通过开关电容方式的基准电路设计,为ADC提供低温度系数的基准电压,具有功耗低的特点。对内嵌了该系统监控电路的亿门级FPGA进行测试,结果表明监测温度范围为-55~125℃,最大偏差为-1.5℃;对单端电压进行监测最大偏差为-1.3%,对差分电压进行监测最大偏差为0.1%。该系统监控电路具有良好的温度特性和频率特性,在-55~125℃温度范围内,ADC的输出结果偏差均在2%以内。在0.2~5.0 MHz频率范围内,时钟频率对ADC的影响可以忽略。在最高5 MHz工作频率下,最大功耗仅为2.32 mW。

In order to improve the reliability and security of FPGA,a low power system monitor circuit was designed in this paper.By monitoring the internal working voltage,temperature and exter⁃nal voltage of FPGA,the working mode or frequency of FPGA can be adjusted in time.In the circuit of the system monitor,a self-balancing integral amplifier was used to realize the sampling and amplifi⁃cation of temperature sensing signals.Single-terminal mode and differential mode were supported for voltage sensing signals.A 1.5-bit cyclic ADC was used to quantify the analog signals.In addition,a reference circuit was designed by switching capacitor,which provides a reference voltage with low temperature coefficient for ADC,and it has the characteristics of low power consumption.The test re⁃sults show that the monitoring temperature ranges from-55℃to 125℃,and the maximum deviation is-1.5℃.The maximum deviation of single terminal voltage monitoring is-1.3%,and that of dif⁃ferential voltage monitoring is 0.1%.The monitoring circuit of the system has good temperature char⁃acteristics and frequency characteristics.In the temperature range of-55⁃125°C,the deviation of ADC output results is within 2%.In the frequency range of 0.2-5.0 MHz,the influence of clock fre⁃quency on ADC can be ignored.At the maximum operating frequency of 5 MHz,the maximum power consumption is only 2.32 mW.