一种基于PJFET输入的高压摆率集成运算放大器

High Slew-Rate Integrated Operational Amplifier with PJFET Input

基于双极型集成工艺设计并制作了一种高压摆率、低输入偏置电流、低输入失调电流的运算放大器。输入级采用p沟道结型场效应晶体管(PJFET)共源结构,有利于减小输入偏置电流,提高信号接收的灵敏度,实现高输入阻抗、低偏置电流、低输入失调电流和高压摆率。增益级采用常规的共射放大电路结构。输出级采用互补推挽输出结构,提升了驱动负载的能力,并克服交越失真。测试结果表明:在电源电压±15 V、25℃环境温度下,开环电压增益为114.49 dB,正压摆率为12.33 V/μs,负压摆率为-9.76 V/μs,输入偏置电流为42.52 pA,输入失调电流为4.23 pA,输出电压摆幅为-13.56~14.16 V,共模抑制比为105.56 dB,电源抑制比为107.91 dB。

A high slew-rate,low input bias current and low input offset current operational amplifier was designed and fabricated based on bipolar integrated process.The input stage adopted a p-channel junction field-effect transistor(PJFET)common source structure,which was conducive to reducing the input bias current,improving the sensitivity to signal reception,and achieving high input impedance,low bias current,low input offset current and high slew-rate.The gain stage adopted a conventional common emitter amplifier circuit structure.The output stage used a complementary pushpull output structure to improve the ability to drive the load and overcome crossover distortion.The tested results show that at a power supply voltage of±15 V and 25 C ambient temperature,the open-loop voltage gain is 114.49 dB,the positive slew-rate is 12.33 V/μs,the negative slew-rate is -9.76 V/μs,the input bias current is 42.52 pA,the input offset current is 4.23 pA,the output voltage swing is -13.56-14.16 V,the common mode rejection ratio is 105.56 dB,and the power supply rejection ratio is 107.91 dB.